Memory Latency

Both hardware and software prefetching have been shown to be eeective in tolerating the large memory latencies inherent in shared-memory multiprocessors; however, both types of prefetching have their shortcomings. In this paper, we propose an integrated hardware/software prefetching method that uses simple hardware that can handle most data accesses and software prefetching for the few remaining accesses. This yields an eeective scheme that minimizes both CPU overhead and hardware costs. Execution-driven simulations show our method to be very eeective.